1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to circuit boards for carrying semiconductor chips and to methods of making the same.
2. Description of the Related Art
All integrated circuits require electrical power to operate, and packaged integrated circuits, which consist of a semiconductor chip mounted on a package substrate, are no exception. Power is normally delivered to integrated circuits via a power supply and some form of power delivery network. Although currently-available power supplies are designed to supply stable voltages, the actual power delivered to integrated circuits can contain significant amounts of noise. There are many sources of noise, such as voltage fluctuations caused by other devices coupled to the power supply, electromagnetic interference and other causes.
Packaged integrated circuits use decoupling capacitors to lower noise on the power supply. Some of these decoupling capacitors are located on the package substrate. A typical conventional decoupling capacitor consists of a stack of plates commonly connected to two terminals. The capacitor is mounted to a package substrate by way of a pair of solder capacitor pads: one for each terminal. The capacitor pads are positioned on and electrically connected to corresponding conductor pads. The conductor pads are connected to various conductor lines or traces in the substrate that link up electrically with the semiconductor chip.
For some conventional semiconductor chip packages, the semiconductor chip is thinned prior to mounting to the package substrate. This is conventionally done by backside grinding to reduce the thickness of the semiconductor chip by sometimes several hundred microns. The thinning process may be carried out for different reasons, such as the preparation of the semiconductor chip for through-silicon via fabrication or the deliberate reduction in the height of the semiconductor chip in order to accommodate package placement in electronic devices with cramped internal spaces, such as notebook computers. Thinned semiconductor chips, while structurally smaller than their full sized counterparts, nevertheless can still dissipate significant amounts of heat and thus require thermal management in the form of heat sinks or the like.
A difficulty associated with a conventional semiconductor chip device that incorporates a thinned semiconductor chip on a package substrate is the potential for interference between the passive devices, such as the capacitors mounted on the upper surface of the substrate, and the overlying heat sink, which is typically fabricated from a conductive metal. In an unthinned semiconductor chip scenario, the upper surfaces of the passive components are normally a comfortable distance below the upper surface of the semiconductor chip and the potential for the overlying heat sink to contact one of the passive components due to asymmetric loading and rocking of the heat sink is relatively low. However, in a thinned semiconductor chip environment, the upper surfaces of the passive components may approach the elevation of the upper surface of the semiconductor chip. In this circumstance, if the heat sink is rocked to one side or the other due to asymmetric loading or other forces, there is the potential for the heat sink to contact one of the passive devices and result in a short, which can produce device failure.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.